1. Technical Field
The present invention pertains to a communications switch preferably for use in telephone switching systems. In particular, the present invention pertains to a distributed architecture telephone switching platform that processes telephone call requests by establishing connections between a communication source and a communication destination without the use of a centralized processor, centralized resources or a centralized switching matrix.
2. Discussion of Prior Art
Generally, modem switching systems (e.g., of the kind employed within central offices and/or private or private automatic branch exchanges) include a time division multiplexed (TDM) bus as a common medium to transport information (e.g., voice or data signals) between multiple sources and destinations on a time-shared basis. Information is typically transported over the time division multiplexed (TDM) bus in units commonly referred to as frames wherein each frame typically includes at least thirty-two time slots within a 125 microsecond frame period. Thus, the bus accommodates 8,000 frames during each one second interval. A connection between a communication source and a communication destination is typically accomplished by notifying the communication source and communication destination of the particular time slot the other is utilizing for transmission of data over the time division multiplexed (TDM) bus. The communication source transmits data during its designated time slot period and examines information received during the time slot utilized by the communication destination in order to retrieve information from the communication destination. Similarly, the communication destination transmits data during its designated time slot period and examines information received during the time slot utilized by the communication source to retrieve information from the communication source. The designated time slots, in effect, provide a connection between the communication source and communication destination and further enable multiple connections, via the different time slots within a frame, for facilitating communications between multiple communication sources and communication destinations. Larger systems frequently use several such buses, each providing a connection between one or a few sources and destinations, and a central time slot interchange unit (i.e., matrix) which makes connections between sources and destinations attached to different buses.
In order to establish a connection between a communication source and communication destination (e.g., processing a telephone call), switching systems frequently utilize a systemwide common database containing information relating to time slot availability (i.e., time slots that are currently available for establishing connections). The database is typically consulted by the communication source and communication destination to ascertain available time slots during which the communication source and communication destination may transmit information across the time division multiplexed (TDM) bus. The database is maintained in real time and may reside within two independent processors when redundant processors are utilized to enhance system fault tolerance. When a time slot is utilized to establish a connection, or when a time slot becomes available subsequent to termination of a connection, the database is updated to reflect the current availability status of the respective time slots. The manner in which connections are facilitated between any communication source and communication destination via a switching system is fairly sophisticated since each communication source potentially requires a connection to each communication destination. A central switching matrix is commonly employed to establish these connections wherein a redundant or spare matrix is frequently employed to automatically replace the original matrix in response to an original matrix failure. Further, several switching systems include common resources and/or utilize a common or central processor to perform substantially all of the connection activity and control for the switching system.
Switches having common or central resources suffer from several disadvantages. Specifically, common processors tend to create bottlenecks, thereby restricting processor throughput and switch efficiency. System enhancement to a common processor switching system via addition of hardware and/or software tends to be difficult due to numerous time critical concurrent processes typically executing within the common processor. Further, a central processor performs several tasks, typically in a multi-tasking environment, thereby complicating programming, debugging and portability of tasks, increasing the chance of real time problems and reducing the processing power for each task. Moreover, a spare or redundant processor is commonly utilized in a central processor switching system since failure of the common processor tends to disable the switching system. The spare processor usually requires real time updates, to coincide with the central processor thereby reducing the central processor throughput.
Common matrices employed within switching systems typically require real time connection maps to indicate the status of matrix connections wherein the connection maps are constantly maintained and updated to accurately reflect the matrix connection state. The maintenance of connection maps is usually performed by a processor, thereby distracting the processor from handling connection requests and reducing switch efficiency. Further, since the size of a centralized matrix increases in relation to an increase in communication sources, expansion of the switch becomes expensive and may exceed cost efficiency. Moreover, since failure of a matrix essentially disables switch operation, an additional redundant matrix is often utilized to automatically replace the original matrix in response to an original matrix failure, thereby substantially increasing the costs and complexity of a switching system. In addition, centralized matrices commonly have a particular quantity of matrix ports (i.e., time slots) physically connected or permanently assigned to a slot or a group of slots within a backplane, thereby restricting the quantity of ports that may be utilized by a source or communication destination connected to the switch through that backplane slot. The matrix port assignment may prevent calls from immediately being processed (i.e., increase blocking) when an insufficient quantity of ports have been assigned to a particular backplane slot (i.e., the quantity of possible simultaneous calls to or from lines or trunks connected to that backplane slot exceeds the quantity of assigned ports). Conversely, the matrix port assignment may waste resources when the quantity of ports assigned to a particular backplane slot exceeds requirements of that backplane slot (i.e., the quantity of assigned matrix ports exceeds the quantity of possible calls from attached lines or trunks, thereby having idle ports that are unavailable to process calls received on other backplane slots).
Generally, switching systems employing common resources for control and/or matrix switching have limited growth potential since the maximum capacity of the central resources governs the switch growth capacity. These systems are typically replaced with larger switching systems to attain increased switching capacity. Further, common resources tend to be expensive, thereby compromising switching system growth potential in favor of lower start-up costs for a small installation. Thus, a common resource switching system may either far exceed switching requirements for an installation (i.e., having more capacity than required), or be insufficient to handle increased switching requirements within a short-term, thereby necessitating replacement by a larger switching system. Moreover, incorporating fault tolerance into a switching system, via redundancy, by duplicating the common resources dramatically increases system costs and requires the system to transfer responsibilities from a failing original resource to a spare resource. This task of incorporating fault tolerance into the switch is extremely arduous with respect to hardware, and becomes even more difficult in relation to software. In addition, existing small switches lack redundancy and do not and can not be modified to comply with Bellcore LSSGR (i.e., Local Access and Transport Area (LATA) Switching Systems Generic Requirements, a standard set of switching requirements).
Prior art systems obviate some of the above described disadvantages by employing a distributed control approach wherein switching tasks performed by a switching system common processor are delegated to several processors or other devices each operating in parallel. The utilization of parallel processing increases processing power and speed for each task since each processor or device is concurrently performing a task as opposed to a single processor executing several tasks. For example, Bloodworth (U.S. Pat. No. 4,455,646) discloses a pulse code modulated digital automatic exchange wherein the exchange includes an input/output system and a data transfer system. The input/output system is connected to a plurality of input/output ports and stores data from these ports in a data store at a location associated with the originating port. The transfer system transfers data from the input store, during a time slot corresponding to a particular port, wherein the input time slots of the respective origination and destination ports become the output time slots for the corresponding other port (i.e., the input time slot for the origination port is the output time slot for the destination port, while the input time slot for the destination port is the output time slot for the originating port).
Bowman et al (U.S. Pat. No. 5,151,896) disclose a distributed digital telephone system wherein switching functions are accomplished by a plurality of switching nodes connected to a link module that establishes interconnections between switching nodes via dynamically assigned time slots on a time division multiplexed (TDM) highway. The system may employ additional highways for fault tolerance and includes a plurality of integrated circuit cards each having a unique identifier based on the position of that card within a backplane of a card cage. The unique identifiers enable resource status information to be broadcasted throughout the system.
Gueldenpfennig et al (U.S. Pat. No. 4,228,536) disclose a distributed time division digital communication system providing two-way communication between a plurality of lines. The system includes a plurality of switching units wherein each switching unit includes ports for interfacing the lines to receive and send digital signals, service circuits (e.g., tone generators, tone signaling senders and receivers, etc.), a time slot interchange and a processor. Switching units communicate via control lines, while send highways enable ports to send and receive data from other switching unit ports. The time slot interchanges include memory locations for send highways of the switching units, wherein digital signals from the send highways are written in corresponding memory locations. Communication is established by selectively receiving data from the send highways during a time slot allocated to a particular port wherein time slot assignment occurs at system initialization and is based upon board position signals residing on lines disposed on a backplane containing the port and service circuits.
Cheng (U.S. Pat. No. 4,686,669) discloses a distributed control switching system wherein a plurality of switching modules are interconnected by a time-multiplexed switch. A connection between modules is established by sending messages between the originating and destination switching modules defining and selecting available channels for connection to the time-multiplexed switch. The time-multiplexed switch establishes a connection via selected channels associated with the originating and destination switching modules. Alternatively, a connection between switching modules may be established by sending messages between an originating and destination switching module defining and selecting a channel from a candidate set of channels such that the originating and destination switching modules negotiate to arrive at available channels to establish the connection.
Ardon et al (U.S. Pat. No. 4,866,708) disclose a channel ownership arrangement between switching modules wherein certain bidirectional channels between the switching modules are owned by different modules. Further, ownership may be modifiable to adapt to call traffic patterns.
Ho (U.S. Pat. No. 4,747,130) discloses a distributed processing telecommunication switching system wherein each of a plurality of switching modules includes a processor, a plurality of ports connected to office lines and/or trunks, a plurality of outlets for establishing intermodule connections, and a switching network for connecting ports and outlets within a module. The module processors are interconnected via a communication facility wherein resource allocation is accomplished by each module broadcasting to the other modules the resource that module has selected. Each module maintains the status of resources and independently determines resource availability.
Combs et al (U.S. Pat. No. 5,365,512), Gulliford et al (U.S. Pat. No. 5,384,776) and Teel et al (U.S. Pat. No. 5,392,278) disclose distributed switching networks exclusively for use in trunked mobile radio including a multi-site switch that routes audio signals between nodes. The switch includes a message bus and an audio time division multiplexed (TDM) bus wherein audio sources are preassigned audio channels on the audio bus. The audio sources constantly broadcast digitized audio signals over the audio time division multiplexed (TDM) bus within their preassigned time slots wherein routing is performed by selectively receiving the signals. The multi-site switch includes nodes that interface various site components and have substantially the same hardware to enable the nodes to be interchangeable. Each node includes audio modules and a controller module that supports audio modules wherein the node controller and audio modules may take the form of printed circuit boards connected to a common backplane.
The prior art systems suffer from several and significant disadvantages. Specifically, the prior art systems typically do not include a truly xe2x80x9copenxe2x80x9d architecture (e.g., an architecture that readily accommodates insertion of newly designed hardware and/or software) having central office quality, thereby making third party hardware and software enhancements difficult to incorporate into those systems. Further, circuit cards of prior art systems generally are incapable of functioning as a complete switch since the cards do not incorporate common resources required to process a call, and often require redundancy within each card to enhance fault tolerance, thereby necessitating synchronization of redundant resources, complicating software development, limiting call setup throughput, and increasing system costs.
Expandability or growth potential of prior art systems is commonly limited due to the expense and effort of incorporating additional hardware and software into those systems, thereby rendering prior art systems inflexible in relation to system port capacity. Similarly, time division multiplexed (TDM) bus capacity in prior art systems tends to be limited in growth potential, thereby causing increased blocking (i.e., calls may not be processed immediately since ports are not available) and degrading system performance. Further, prior art systems tend to allocate time slots to specific backplane slots or cards, thereby creating inflexible systems that waste resources and may require specific cards to be disposed in particular backplane slots. The allocation of time slots in this manner tends to prevent concentration of traffic (i.e., controlling the quantity of ports or time slots in relation to the quantity of calls that can be received in a particular backplane slot) since, generally, the quantity of time slots is predetermined and there is no switching between backplane slot ports and external sources of call traffic (e.g., lines or trunks). Communication between switching nodes in prior art systems may utilize Ethernet to facilitate message transmissions between nodes, however, Ethernet permits collisions for bus access (i.e., more then one unit at a time attempting to access the bus), thereby degrading message transference efficiency and introducing the possibility of lost messages. Although message transference is accomplished, the transaction may not appear as a point to point connection, thereby precluding use of commercially available software for standard integrated services digital network (ISDN) messaging. Fault tolerance within prior art systems typically requires a common entity to detect a failure and switch over to a redundant or spare component, thereby incurring the disadvantages of common resources described above. In addition, prior art systems typically do not provide a high degree of fault tolerance, such as dual distribution of clocks and power, redundant, independent message buses to enable failure detection and selection of an alternate message bus by any circuit card interfacing the message buses, and ensuring that a single point failure disables a maximum of half the system, thereby increasing the risk that a failure affects the entire switching system.
Accordingly, it is an object of the present invention to enhance operation of a telephone switch by distributing call processing functions to circuit cards within the switch that each function as a complete switch having resources to perform switching functions.
It is another object of the present invention to perform switching functions in a distributed telephone switching system without the use of a common centralized matrix.
Yet another object of the present invention is to enhance fault tolerance within a telephone switch by reducing redundancy and distributing call processing functions among circuit cards within the switch such that failure of a single card does not disable the entire switch.
Still another object of the present invention is to enhance adaptability of telephone switches to various applications by providing a telephone switch having an xe2x80x9copenxe2x80x9d architecture (e.g., an architecture that readily accommodates insertion of newly designed hardware and/or software).
A further object of the present invention is to enhance flexibility of distributed telephone switches by enabling any type of switch circuit cards to be inserted into a group of identical backplane slots within a switch in any fashion wherein each circuit card accessing a backplane data bus is assigned bus time slots to avoid collisions during data bus access for transmission of information over the backplane data bus within the switch. Similarly, each circuit card accessing a backplane message bus is provided with an opportunity to transmit information onto the backplane message bus one circuit card at a time to avoid collisions during message bus access.
Yet another object of the present invention is to enhance flexibility and expandability of telephone switches by enabling shelves containing switch cards within a telephone switch to be interconnected by a distributed matrix and thereby accommodate various quantity ranges of ports on each of numerous identical card slots.
Still another object of the present invention is to control concentration of traffic within a switch via flexible pre-assignment of various quantities of time slots to different switch circuit cards inserted into a backplane slot of the switch.
The aforesaid objects are achieved individually and in combination, and it is not intended that the present invention be construed as requiring two or more of the objects to be combined unless expressly required by the claims attached hereto.
According to the present invention, a multiple application switching platform includes a switch having a distributed open architecture and incorporating redundancy for enhanced fault tolerance. The switch includes at least one shelf having a midplane containing redundant high speed, high level data link control (HDLC) serial buses and redundant time division multiplexed (TDM) data buses. Shelves may be interconnected to form a group wherein the message and data buses of each group shelf contain substantially the same information. Various circuit cards are connected to each shelf midplane in order to perform call processing, wherein each card within a group accessing a data bus is pre-assigned a unique set of time slots for each data bus within which that card may transmit onto that data bus. Similarly, each card is identified by a unique identification number that is retrieved from the midplane slot. The card identification number, which is based on the position of a card within the midplane, typically includes the shelf and midplane slot number. The card identification numbers are utilized to permit each card within a group interfacing the message bus an opportunity to transmit a message onto the message bus. The circuit cards typically include line or trunk switch cards that each function as an independent switch and interface line or trunks to a shelf midplane. Line and/or trunk circuit cards communicate with other line and/or trunk circuit cards within a group via the message bus and transfer call information between cards (e.g., voice data) over the data bus in order to establish a connection. Further, each group includes a database/processor card that maintains billing and other information, and downloads switch configuration information (e.g., programs, tables, time slot assignments) to circuit cards. A data communications card may interface external host computers via an Ethernet interface, or common signaling systems (e.g., SS7, TR303). Switch, database/processor and data communications circuit cards each typically include an application processor and a communications processor to control call processing functions and handle messages, respectively. The communications and application processors communicate via a dual port RAM, and each processor includes a real time operating system to control messaging and call processing. In addition, each shelf contains power cards and power buses to distribute power to the shelf circuit cards, and expander cards for distributing common clock signals and enabling connection to other shelves within a group as described above. Thus, one card within a group is permitted to transmit on a single data bus during a time slot, while one card is permitted to transmit a message on a single message bus based on the card identification number.
Communication between lines or trunks connected to any group shelf is facilitated by switch circuit cards communicating with each other via messages sent over the message bus. The switch repeatedly cycles through each card identification number to provide each card an opportunity to transmit a message onto the message bus. The switch ceases cycling through the card identification numbers during transmission of a message such that only one card transmits a message on a single message bus at any one time. The messages coordinate the transmission and reception of call information, while the switch circuit cards transmit data (e.g., voice data) over the data buses. A switch master clock cycles through data bus time slots wherein only a single circuit card is permitted to transmit on a single data bus during each time slot, as described above, while each circuit card receives information during all time slots. Each shelf circuit card accessing a data and/or message bus includes specific circuitry to respectively enable data and/or message bus access in this manner.
The above and still further objects, features and advantages of the present invention will become apparent upon consideration of the following detailed description of a specific embodiment thereof, particularly when taken in conjunction with the accompanying drawings wherein like reference numerals in the various figures are utilized to designate like components.